International Journal of Engineering and Technology

Multipliers are inevitable components in digital system design and embedded applications. The performance parameters of multipliers play a vital role in maximizing the efficiency of these applications. Different algorithms have been proposed for improving the performance parameters of multipliers. This paper formulates a comparative study of some of the well known existing multipliers and thereafter proposes a robust design. The multiplier with a carry-look-ahead adder has shown a better performance over the multiplier with a ripple adder in terms of gate delays.