|
ABSTRACT
ISSN: 0975-4024
Title |
: |
Parallel and Mixed Hardware Implementation of Artificial Neuron Network on the FPGA Platform |
Authors |
: |
ATIBI Mohamed, ATOUF Issam, BOUSSAA Mohamed, BENNIS Abdellatif |
Keywords |
: |
ANN, hardware resource, execution time, FPGA, module of a formal neuron. |
Issue Date |
: |
Oct - Nov 2014 |
Abstract |
: |
Most applications in different fields (automotive, robotics, medical…) take advantage of the proven performance by artificial neural networks to solve their most complex problems. The architecture chosen for implementation is the multilayer perceptron that uses retro propagation as a learning algorithm. This article presents modular hardware implementation of multilayer perceptron architecture of artificial neuron network ‘ANN’, in the FPGA platform according to two models (parallel and mixed hardware implementation), and the comparison between these two implementations in terms of hardware resources and execution time. The two implementations are based on the proposed module of a formal neuron with the sigmoid activation function. |
Page(s) |
: |
2008-2016 |
ISSN |
: |
0975-4024 |
Source |
: |
Vol. 6, No.5 |
|