Abstract |
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With continuous advancements evolving in the VLSI design arena, the real time chips which operates on the principle of charge recovery logic realizes substantially lower power dissipation levels than the conventional circuit technique counterparts. In early times, the research in adiabatic logic computing engrossed on the asymptotic energetics of computation, discovering new VLSI techniques in the process, which utilizes reversible logic and the adiabatic switching (or the so called energy recovery logic). In this paper, a review of the Adiabatic Logic circuits found in the literature has been presented, while operating these logic circuits using the FinFET devices. The performance benefits acquired in the circuits while using the FinFET devices in place of CMOS devices are explored. The quasi-adiabatic circuits operating with four phase power clock supplies, namely, the 2N-2P, 2N2N-2P, PFAL, PSAL, DCPAL, CPAL and ICPAL structures have been considered for the analysis. The 32nm & 45nm conventional CMOS devices and 32nm double gated FinFETs have been used for the performance analyses carried out using the industry standard Cadence® EDA tools. |