International Journal of Engineering and Technology

In the proposed multiplier configuration, a new technique is proposed for multiplication of two sampled analog signals and the output is in digital form. One analog signal is fed to the input of first delta-sigma modulator (DSM1) after sampling. The sampled output of the second analog signal is negated or not negated depending on the bit state at the output of DSM1 and is fed to the input of second DSM(DSM2).The resulting bit stream at the output of DSM2 is the digital representation of the product of the sampled data of the two analog signals.